gen_fabric

Fabric generation module for FABulous FPGA architecture.

This module generates the top-level RTL description of an FPGA fabric, handling tile instantiation, interconnect wiring, and configuration infrastructure. The generated fabric uses a flat description approach for easier debugging and verification.

Key features:

  • Flat fabric instantiation with direct tile-to-tile connections

  • Support for both FlipFlop chain and Frame-based configuration

  • External I/O port handling for BEL connections

  • Supertile support for hierarchical tile organization

  • Configuration data distribution and management

Functions

generateFabric(writer, fabric)

Generate the fabric.

Module Contents

generateFabric(writer, fabric) → None[source]

Generate the fabric.

This function creates a flat description of the FPGA fabric by instantiating all tiles and connecting them based on the provided fabric definition. It handles the generation of top-level I/O ports, wiring between adjacent tiles, and the configuration infrastructure (either Frame-based or FlipFlop chain).